Design Verification Manager
2 weeks ago
Who we are:
At UST, we help the world's best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 25 countries, we build for boundless impact—touching billions of lives in the process. Visit us at
Experience: 10+ years
Working location: Penang, Malaysia
Job Description
- Provide technical guidance to the verification team on strategy, test plans, and execution.
- Participate in and contribute to technical assessments, reviews, and issue resolutions.
- Drive technical improvements and best practices across the team
- Support project planning, resource allocation, performance management and milestone tracking in collaboration with the project manager and/or lead
- At least 10 years of relevant experience
Required Qualifications:
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- 10+ years of experience in ASIC/SoC verification using
SystemVerilog
and
UVM
. - Strong understanding of digital design and verification fundamentals.
- Experience with managing team
Contact
Ms. Anna - WhatsApp:
Email:
anh.thivannguyen@
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