SOC Design Validation Engineer
1 month ago
SOC Design Validation Engineer page is loaded SOC Design Validation Engineer Apply locations Malaysia, Penang time type Full time posted on Posted Yesterday job requisition id JR0258861 Job Details: Job Description:
IFS (CDE) Customer Design Enablement team is looking for a dynamic engineer who can validate high speed digital interfaces like UCIe, LPDDR, PCIe, Protocol bridges (AXI/CFI/APB/PSF), NOC, HBI, FDI, etc ... and collaborate with internal teams, document micro-architecture and implement the test plan using System Verilog OVM/UVM. In this role you will be actively involved in the hardware modelling and simulations, random and focused stimulus generation and coverage.
Job responsibilities include but are not limited to:Integration of simple to complex IP's.
Define module interfaces/formats for simulation in full chip designs, RTL coding, and simulation for SoCs.
Participate in the verification of various IPs for various process technologies.
Create verification test plan and participate in discussion across architect and design verification environment in UVM for pre-silicon.
Participate in re-structure or create test benches in UVM or RAL
Active involvement in hardware modeling and simulation, random and focused stimulus generation and functional coverage.
Work with cross-functional teams to make sure designs are delivered on time, and with highest quality, by incorporating proper checks at every stage of the design process.
Bachelor's degree in Computer Engineering, Electrical Engineering, or equivalent with Master's degree in Computer Engineering, Electrical Engineering.
1+ years of industry experience listed below.
Expertise in Verilog/System Verilog, Lint/CDC/Synthesis/STA/Formal Equivalent Verification, etc.
Digital design or Computer architecture, or Object-Oriented Programming (OOP), or Design verification System Verilog OVM/UVM.
Knowledge in ASIC validation methodology, Verilog testbenches, UVM and RAL.
Experience in simulation/debug tools: VCS, Verdi.
Demonstrate excellent communication, leadership and teamwork skills.
Knowledge in Unix shell, Python and Perl scripting.
Knowledge in Design For Test (DFT), synthesis and APR tools.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Similar Jobs (5) SOC Logic Design Engineer locations 2 Locations time type Full time posted on Posted 18 Days Ago SOC Logic Design Engineer locations Malaysia, Penang time type Full time posted on Posted Yesterday SOC Logic Design Engineer locations Malaysia, Penang time type Full time posted on Posted YesterdayIntel provides reasonable accommodation to applicants and employees. For more information on our Reasonable Accommodation process, please click here .
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