Senior Physical Design Engineer
2 weeks ago
Physical Design Engineer role focusing on block/SOC level RTL-gds2 implementation and timing closure.
Key Responsibilities
- Perform low power & signoff checks (MVRC/CLP, LEC/Formality, DRC, LVS, IR, EM)
- Write scripts in TCL/SHELL/PERL
- Implement low power techniques
- Work with lower tech nodes (10nm, 7nm, 5nm)
- Use Synopsys/Cadence tools
- Execute Signoff methodologies
- Handle client requirements
Education: Bachelors in Electronics & Communication/Electrical & Electronics (Master's in VLSI preferred)
Experience: 4 - 7 years
Seniority levelMid-Senior level
Employment typeFull-time
Job functionEngineering and Information Technology
IndustriesSemiconductor Manufacturing
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