Senior Physical Design Engineer

2 weeks ago


Penang, Malaysia SignOff Semiconductors Full time

Physical Design Engineer role focusing on block/SOC level RTL-gds2 implementation and timing closure.

Key Responsibilities

  1. Perform low power & signoff checks (MVRC/CLP, LEC/Formality, DRC, LVS, IR, EM)
  2. Write scripts in TCL/SHELL/PERL
  3. Implement low power techniques
  4. Work with lower tech nodes (10nm, 7nm, 5nm)
  5. Use Synopsys/Cadence tools
  6. Execute Signoff methodologies
  7. Handle client requirements

Education: Bachelors in Electronics & Communication/Electrical & Electronics (Master's in VLSI preferred)

Experience: 4 - 7 years

Seniority level

Mid-Senior level

Employment type

Full-time

Job function

Engineering and Information Technology

Industries

Semiconductor Manufacturing

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