Director of Engineering

1 day ago

Penang, Malaysia U3 Infotech Full time 120,000 - 240,000 per year

Director of Engineering - Network on Chip

Job location : Penang

This role will lead the architecture, design, and development of high-performance interconnect solutions for SoCs, chiplets, and advanced packaging systems. The ideal candidate will have deep expertise in NoC architecture, RTL/micro-architecture design, performance modeling, and verification, combined with strong leadership skills. Experience in both hardware and software development is a strong plus, as it enables system-level optimization, modeling, and seamless HW/SW co-design for next-generation NoC solutions. The NoC Team Director will drive technical strategy, manage execution, mentor a multidisciplinary team, and collaborate with cross-functional partners to deliver state-of-the-art interconnect IP for data-intensive and AI-driven applications.

Responsibilities

Leadership & Strategy

  • Define and execute the company's NoC technology roadmap, aligned with product and system-level requirements.
  • Build, mentor, and lead a high-performing team of architects, designers, verification engineers, and performance modelers.
  • Foster innovation in NoC design, methodology, and automation to achieve best-in-class power, performance, and area (PPA).

NoC Architecture & Design

  • Lead the design of scalable, configurable, and high-bandwidth NoC architectures for heterogeneous SoCs and multi-die systems.
  • Drive micro-architecture, RTL design, and integration of NoC subsystems, including coherency, QoS, and security features.
  • Oversee performance modeling, traffic analysis, and system-level simulation to ensure NoC meets latency and bandwidth requirements.
  • Collaborate with physical design teams to optimize NoC topology, floorplanning, and timing closure.

Cross-Functional Collaboration

  • Partner with CPU/GPU/AI accelerator, memory subsystem, and IP teams to define NoC interfaces and integration requirements.
  • Collaborate with software teams on NoC modeling frameworks, traffic generators, drivers, and firmware for validation and optimization.
  • Engage with product and system architects to align NoC capabilities with end-market requirements (AI/ML, datacenter, automotive, mobile).

Execution & Delivery

  • Own NoC project planning, execution, and delivery, ensuring schedule adherence and quality.
  • Establish and improve design methodologies, verification flows, and automation for rapid, reliable development.
  • Support bring-up, debug, and performance validation in both pre-silicon and post-silicon environments.

Qualifications

  • Master's or Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. PhD is a plus.
  • 15+ years in semiconductor design, with at least 5+ years leading NoC, interconnect, or complex subsystem development teams.
  • Proven track record in NoC or interconnect architecture, RTL design, and integration in large-scale SoCs or multi-die systems.
  • Strong understanding of coherency protocols, memory hierarchy, QoS mechanisms, and security within NoC.
  • Hands-on experience with NoC performance modeling, verification, and traffic analysis.
  • Familiarity with advanced packaging (2.5D/3D IC, chiplets, interposers) is highly desirable.
  • HW/SW development experience (system simulators, firmware, drivers, or NoC modeling frameworks) is a strong plus.
  • Excellent leadership, communication, and problem-solving skills.
  • Customer and partner engagement experience preferred.

Interested candidates please share your CV to

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