Analog Layout
1 day ago
Job Description :
- Participate in block/IP/chip floor planning from scratch, performing routing & layout verification (such as LVS, DRC, Antenna & others) and troubleshooting the results
- Co-lead/lead the physical layout of IP/full chip design by working closely with cross functional team leader [Teresa: requirements for Senior Staff/ Staff Engineer level]
- Conduct thorough layout design reviews internally & external review with circuit designers
- Extensive use of CAD tools (Cadence Virtuoso--VXL & Mentor Calibre) in IP/chip integration and verification
- Capable in guiding/coaching junior engineers for on time delivery & quality
Requirements :
- Bachelor's degree in electrical/Electronic Engineering/Physics with VLSI exposure or equivalent 9 to 14 years of job experience in layout design field is preferred.
- Hands on with Analog Layout, Layout Versus Schematic, +Cadence Virtuoso, CMOS, Analog CMOS Circuits, Floorplanning, Layout Verification, Design Rule Checking, VLSI Design
- Hands-on experience in analog layout from scratch, implementation of analog layout techniques, IR drop/EM analysis
- Deep understanding of analog circuit layout concepts in submicron CMOS technologies
- Possess strong technical, analytical & problem-solving skills in layout design
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