Jobs: verification engineer

Your key responsibilities:Manage all aspects of engineering projects and product verification and validation activities, ensuring completion on time and within budget.Plan and conduct verification and validation projects using scientific methods, theories, and engineering practices. Design, communicate, and implement execution plans, monitor progress, and...

Design Verification EngineerLocation: Penang, MalaysiaExperience: 4+ yearsAbout the role:We are looking for a highly motivated and skilled Design Verification Engineer to join our growing team in Penang, Malaysia. As a Design Verification Engineer, you will be responsible for verifying the design of complex digital circuits, ensuring that they meet the...

My Client, is a consultancy firm helping a established microchips processor company is search for a Verification Engineer.Role:Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified.Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the...

Position:Design Verifcation EngineerExperience: 0-3 yearsLocation: Penang, MalaysiaResponsibilities:Develop detailed verification plans based on design specifications and architectural requirements.Create and maintain testbenches for complex digital designs using SystemVerilog and UVM (Universal Verification Methodology).Write, debug, and execute test cases...

Work Location: Penang, MalaysiaExperience: 7+ yearsNo of positions : 6【Responsibilities】1.Develop detailed verification plans based on design specifications and architectural requirements.2.Create and maintain testbenches for complex digital designs using SystemVerilog and UVM (Universal Verification Methodology).3.Write, debug, and execute test cases to...

Responsibilities:Perform pre-Si verification on various IP blocks and full-chip of FPGA/ASIC designs.The job scope includes test plan definition, System Verilog/UVM test bench and content development, debugging and running regression to deliver good-quality design.Candidate will work closely with team and interact with product/IP architect, logic design...

Job title: Junior/Senior/Staff Design Verification EngineerLocation: KL/Penang (on-site)Job Type: Full-time Malaysians only and/or have permit to work in MalaysiaWe are growing and looking for self-motivated, multi-tasker, and demonstrated team-player. This position will be responsible for RTL verification, debug, functional coverage tasks, testplan...

WHAT YOU DO AT AMD CHANGES EVERYTHINGAt AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create...

Job Description:The SOC Verification Engineer will be responsible for pre-silicon RTL verification of block and top level SOC. With deep understanding of SOC architecture and meticulous attention to details, you will interact with all disciplines to develop reusable testbench and verification environment deploying the latest methodology with metric driven...

*Lattice Overview*There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales,...

[Multiple Junior and Senior headcounts available in different specializations]UVM & SV generalUVM & SV with PCIe / PCHUVM & SV with USBUVM & SV with IOHUBUVM & SV with FPGAJob Responsibilities:Be part of a team verifying complex IPs and driving them to closure against challenging milestones.Build verification environments and UVM/OVM...

Lattice OverviewThere is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales,...

IC Design Verification Engineer (12 mths contract with 1 mth completion bonus) - SingaporeThis position is based in Singapore.The role works within the digital team in Singapore that includes all disciplines required for digital design and verification.Responsibilities: Work on Digital IP verification or SOC verification. Verification planning, this includes...

[Multiple Junior and Senior headcounts available in different specializations]UVM & SV generalUVM & SV with PCIe / PCHUVM & SV with USBUVM & SV with IOHUBJob Responsibilities:Be part of a team verifying complex IPs and driving them to closure against challenging milestones.Build verification environments and UVM/OVM testbenches based on chip...

Are you passionate to be in the role as Engineer - Verification & Validation? Do you have experience in Verification & Validation ? If so, this opportunity could be for you Join us at B. Braun, a leader in the medical devices industry, where your skills and experience will be recognized and celebrated. Take the next step in your career with us and...

MeyvnSystemsis Hiring – Design Verification Engineers (Malaysia)We are looking for Design Verification Engineers with strong experience in: PCIe (Mandatory) Verilog / SystemVerilog UVM IP / SoC VerificationExperience : 5years to 10Years Location: Malaysia Notice Period: Immediate to 30 days Interested candidates, please share your updated resume

Job Description:The Building Management System (BMS) Project Engineer is responsible for the design, implementation, and execution of BMS projects. This role involves overseeing the procurement, installation and commissioning that control and monitor a building's mechanical, electrical, and plumbing (MEP) infrastructure to ensure efficient, sustainable, and...

Job DetailsJob Description:Performs functional logic verification of an FPGA to ensure design will meet specification requirements. Develops FPGA verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to...

Job Description:Will be part of a team that handles Verification for complex IP's and close the Verification to the challenging milestones.IP Verification: VR creation as per the chip requirements and UVM/OVM Test benches creationSupport in building verification infrastructure at the chip level as per the requirementsCapable of handling multiple areas of IP...

Job Description: Be part of a team in creating state -of -the -art Secure Low Power SoC ARM -based MCU for the  Low -End, Mid -End, and High -end  performance MCU product line in a IC Design Environment Responsibilities: • To develop UVM -based test suite and simulation environment for the verification of standalone IP level and SoC ARM -based system...