Physical Design Engineer
7 days ago
UST Malaysia is seeking a talented Physical Design Engineer - Analog Circuits to join our semiconductor manufacturing team. As an expert in physical design verification tools, you will play a key role in the development of high-performance analog/mixed-signal CMOS Integrated Circuits.
Key Responsibilities:- Work closely with circuit designers to complete the physical layout and verification of high-performance analog/mixed-signal CMOS Integrated Circuits using Cadence Virtuoso XL Layout and PVS Verification tools.
- Use problem-solving skills and creativity to design circuits that meet size, schedule, and performance specifications while meeting FinFET technology rules.
- Run physical design verification tools to debug, improve, and verify layout blocks.
- Collaborate with fellow team members on continuous improvement opportunities in design flow, techniques, and methodologies.
Requirements:
- 5+ years' experience in IC layout design in FinFET technology node.
- Strong understanding of layout fundamentals and best practices.
- Proficiency in CAD tools like Cadence Virtuoso XL, PVS/Calibre.
- Experience with synthesis/advanced place & route tools (Innovus) is a plus.
- Familiarity with Cadence Design Environment (CDE) and Unix OS.
- Programming knowledge in SKILL is a plus.
- Excellent communication skills and teamwork abilities.
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